(1) Field Of The Invention
The invention relates to cold cathode field emission displays and methods for manufacturing them
(2) Description Of The Prior Art
Cold cathode electron emission devices are based on the phenomenon of high field emission wherein electrons can be emitted into a vacuum from a room temperature source if the local electric field at the surface in question is high enough. The creation of such high local electric fields does not necessarily require the application of very high voltage, provided the emitting surface has a sufficiently small radius of curvature.
The advent of semiconductor integrated circuit technology made possible the development and mass production of arrays of cold cathode emitters of this type. In most cases, cold cathode field emission displays comprise an array of very small conical emitters, each of which is connected to a source of negative voltage via a cathode conductor line or column. Another set of conductive lines (called gate lines) is located a short distance above the cathode lines at an angle (usually 90 .degree.) to them, intersecting with them at the locations of the conical emitters or microtips, and connected to a source of positive voltage. Both the cathode and the gate line that relate to a particular microtip must be activated before there will be sufficient voltage to cause cold cathode emission.
The electrons that are emitted by the cold cathodes accelerate past openings in the gate lines and strike an electroluminescent panel that is located a short distance from the gate lines. In general, a significant number of microtips serve together as a single pixel for the total display. Note that, even though the local electric field in the immediate vicinity of a microtip is in excess of 1 million volts/cm., the externally applied voltage is only of the order of 100 volts.
In FIG. 1 we show, in schematic cross-section, the basic elements of a typical cold cathode display. A series of metallic lines 2 is formed on the surface of an insulating substrate 1. Said lines are referred to as cathode columns. At regular intervals along the cathode columns, microtips 5 are formed. These are typically cones of height about one micron and base diameter about one micron and comprise molybdenum or silicon, though other materials may also be used. In many embodiments of the prior art, local ballast resistors (not shown here) may be in place between the cones and the cathode columns
A second series of metallic lines 4 are formed at right angles to the cathode columns, intersecting them at the locations of the microtips. A layer of insulation 3 supports lines 4, which are generally known as gate lines, placing them at the top level of the microtips, that is at the level of the apexes of the cones 5. Openings 11 in the gate lines 4, directly over the microtips, allow streams of electrons 9 to emerge from the tips when sufficient voltage is applied between the gate lines and the cathode columns. Because of the local high fields right at the surface of the microtips, relatively modest voltages, of the order of 100 volts are sufficient.
After emerging through the openings 11 in the gate lines, electrons 9 are further accelerated so that they strike fluorescent screen 6 where they emit visible light rays 10. Screen 6 is part of the top assembly which comprises a glass plate 8 on which has been deposited a transparent conducting layer 7 comprising a material such as indium-tin-oxide. Said top assembly is separated from the cold cathode assembly by spacers (not shown) and the space between these two assemblies is evacuated to provide and maintain a vacuum of the order of 10.sup.-7 torr.
In general, to facilitate manufacturing, openings in the gate lines, such as 11 in FIG. 1, end up having diameters comparable to that of the bases of the micro-cones 5. A smaller diameter for these openings would be advantageous because higher electric field can be generated, resulting in lower turn-on voltages.
The present invention is directed towards improved methods for manufacturing lower assemblies of the general form shown in FIG. 1, including the reduction of gate line hole sizes. Allman (U.S. Pat. No. 5,312,512) is an example of the application of Chem.-Mech. polishing to the processing of silicon integrated circuits but is not obviously applicable to cold cathode devices which are normally manufactured without use of Chem.-Mech. polishing.